Running on lw cpu

.gitignore

@@ -1 +1,2 @@
 /target
+text.bin

Cargo.toml

@@ -6,3 +6,14 @@ edition = "2021"
 [dependencies]
 riscv = "0.12.1"
 riscv-rt = "0.13.0"
+
+# https://docs.rust-embedded.org/book/unsorted/speed-vs-size.html
+[profile.release]
+# symbols are nice and they don't increase the size on Flash
+debug = true
+codegen-units = 1
+opt-level = "z"
+
+[profile.dev.package."*"]
+codegen-units = 1
+opt-level = "z"

Makefile

@@ -0,0 +1,14 @@
+default: extract
+
+build:
+	cargo build --release
+
+extract: build
+	riscv32-elf-objcopy -O binary --only-section=.text target/riscv32i-unknown-none-elf/release/lw-riscv text.bin
+
+size: extract
+	cargo size --release -- -A
+
+clean:
+	cargo clean
+	rm text.bin

src/main.rs

@@ -12,11 +12,11 @@ fn panic_handler(_info: &PanicInfo) -> ! {
 
 #[entry]
 fn main() -> ! {
-    const MEM_ADDR: *mut u32 = 0x1000_0001 as *mut u32;
+    const MEM_ADDR: *mut u32 = 0x1000_0004 as *mut u32;
     loop {
-        for i in 0..10 {
+        for i in 0..100 {
             unsafe {
-                write_volatile(MEM_ADDR, 0b1101100+i);
+                write_volatile(MEM_ADDR, 0b01101100+i);
             }
             nop();
         }