From 5faead9fc67f941cf6395839dee3f46f521139a8 Mon Sep 17 00:00:00 2001
From: D4VID <d4vid@d4vid.xyz>
Date: Sat, 30 Aug 2025 18:08:06 +0200
Subject: [PATCH] Reduce spasing aroung binary op

---
 verilog2logicworld/src/cells/binary_op.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/verilog2logicworld/src/cells/binary_op.rs b/verilog2logicworld/src/cells/binary_op.rs
index 55c0cb5..6ddf99b 100644
--- a/verilog2logicworld/src/cells/binary_op.rs
+++ b/verilog2logicworld/src/cells/binary_op.rs
@@ -179,7 +179,7 @@ pub fn binary_op(
         },
     );
 
-    next_position[2] += 5 * SQUARE;
+    next_position[2] += 4 * SQUARE;
 
     return components;
 }