Add component map

logicworld-subassembly/Cargo.lock

@@ -11,11 +11,18 @@ dependencies = [
  "syn",
 ]
 
+[[package]]
+name = "lazy_static"
+version = "1.5.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "bbd2bcb4c963f2ddae06a2efc7e9f3591312473c50c6685e1f298068316e66fe"
+
 [[package]]
 name = "logicworld-subassembly"
 version = "0.1.0"
 dependencies = [
  "binary-serialize-derive",
+ "lazy_static",
  "quaternion",
  "vecmath",
 ]

logicworld-subassembly/Cargo.toml

@@ -5,5 +5,6 @@ edition = "2021"
 
 [dependencies]
 binary-serialize-derive = { path = "../binary-serialize-derive" }
+lazy_static = "1.5.0"
 quaternion = "2.0.0"
 vecmath = "1.0.0"

logicworld-subassembly/src/lib.rs

@@ -1,4 +1,6 @@
+use lazy_static::lazy_static;
 use std::{
+    collections::HashMap,
     fs::{self, File},
     io::{self, Write},
     path::Path,
@@ -8,13 +10,23 @@ use crate::lw::{BinarySerializable, ComponentIdMap, ModVersion, Version};
 
 pub mod lw;
 
-// Convert component text id into numeric id
-pub fn component_id(text_id: &str) -> i16 {
-    match text_id {
-        "MHG.CircuitBoard" => 1,
-        "MHG.AndGate" => 2,
-        _ => -1,
-    }
+lazy_static! {
+    pub static ref COMPONENT_MAP: HashMap<&'static str, u16> = HashMap::from([
+        ("MHG.CircuitBoard", 1),
+        ("MHG.Peg", 2),
+        ("MHG.Inverter", 3),
+        ("MHG.AndGate", 4),
+        ("MHG.XorGate", 5),
+        ("MHG.DLatch", 6),
+        ("MHG.Relay", 7),
+        ("MHG.Buffer", 8),
+        ("MHG.Buffer_WithOutput", 9),
+        ("MHG.Delayer", 10),
+        ("MHG.Socket", 11),
+        ("MHG.ChubbySocket", 12),
+        ("MHG.Mount", 13),
+        ("MHG.PanelLabel", 14),
+    ]);
 }
 
 enum SaveType {
@@ -67,16 +79,10 @@ fn write_subassembly_file(
     }];
     mods.write_to(file)?;
 
-    let component_id_map = vec![
-        ComponentIdMap {
-            numeric_id: 1,
-            text_id: "MHG.CircuitBoard".to_owned(),
-        },
-        ComponentIdMap {
-            numeric_id: 2,
-            text_id: "MHG.AndGate".to_owned(),
-        },
-    ];
+    let component_id_map: Vec<ComponentIdMap> = COMPONENT_MAP.iter().map(|pair| ComponentIdMap {
+        text_id: pair.0.to_string(),
+        numeric_id: *pair.1,
+    }).collect();
     component_id_map.write_to(file)?;
 
     for component in components {

logicworld-subassembly/src/lw.rs

@@ -64,7 +64,7 @@ impl Output {
 
 #[derive(BinarySerializable)]
 pub struct ComponentIdMap {
-    pub numeric_id: i16,
+    pub numeric_id: u16,
     pub text_id: String,
 }